1. Field of the Invention
The present invention relates to a semiconductor device, a system including a semiconductor device, and calibration thereof. More particularly, the present invention relates to a calibration method and a calibration circuit for controlling an impedance of an output driver connected to an external terminal.
2. Description of Related Art
A semiconductor device according to a related art includes a calibration circuit therein so as to control an impedance of each output driver formed by transistors. The calibration circuit includes a replica circuit which is identical in structure to the output driver of the semiconductor device. The replica circuit is connected to an external terminal, to which an external resistance element is connected at the time of calibration. The external resistance element is located or arranged outside of the semiconductor device and, for example, is placed on a motherboard in a system on which the semiconductor device has been mounted. If the system is formed by a module on which a plurality of semiconductor devices are mounted, the external resistance element is provided on the module substrate.
The calibration is performed by connecting the external resistance element of a predetermined resistance value (e.g., 240 Ω±1%) between the external terminal and the ground. When a power source voltage (e.g., 1.5 V) is applied to the replica circuit, a divided voltage appears on the external terminal as a result of dividing the power source voltage by the replica circuit and the external resistance element. While the divided voltage appearing on the external terminal is compared with a reference voltage (equal to a half of the power source voltage), the impedance value of the replica circuit is controlled such that the divided voltage of the external terminal is equal to the reference voltage. Thus, the controlled impedance value of the replica circuit is equal to the resistance value of the external resistance element. An impedance value of the output driver is controlled by the use of control information (calibration information) for controlling the impedance value of the replica circuit. See, e.g., JP-A 2007-110615 (Patent Document 1) and JP-A 2008-135925 (Patent Document 2). In the following description, the external resistance element may simply be referred to as an external resistor, and the impedance value may simply be referred to as the impedance.
In a semiconductor device according to the related art (which may simply called a related semiconductor device hereinafter), the calibration method is performed by using a half voltage (½: e.g., 0.75 V) of the power source voltage VDD as the reference voltage. However, a voltage equal to the power source voltage VDD is supplied to the output driver when the output driver is actually operated (for example, at the time of read-out when stored information is outputted from the semiconductor device after calibration). Specifically, voltage relationships supplied to gate terminals, source terminals, and drain terminals of the transistors of the output driver may be often changed to each other at the time of the calibration and at the time of the read-out. Therefore, an impedance at the time of the read-out of the output driver may differ from an impedance calculated by the calibration. Furthermore, a difference between the impedance calculated by the calibration and the impedance at the time of actual operation may vary (or have variations) depending upon the output driver. Moreover, according to the calibration method of a related semiconductor device, the system consumes much electric power when the calibration is performed. Furthermore, according to the calibration method of a related semiconductor device, the calibration requires a long period of time until it is finished. Moreover, in some cases, the calibration method of a related semiconductor device cannot complete impedance matching within the period of the calibration due to external/internal factors such as noise caused at the time of the calibration. Furthermore, in view of improvement of the integration and reduction of the number of parts, it is desirable to eliminate an external resistance element from a highly integrated substrate.